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Use of re-programmable chips gaining momentum

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Bibhu Ranjan Mishra Chennai/ Bangalore
Last Updated : Feb 14 2013 | 8:59 PM IST
Customers of consumer electronics products are constantly demanding new features in the devices they are using.
 
To incorporate these, manufacturers either need to change the chip that is used in the device or rewrite the programme in the chip if the chip allows this. The re-programming is possible if the chip was made using field programmable gate array (FCGA) technology.
 
In such a chip all you need to do is erase the existing programme and re-programme it suiting the new functionality sought. In contrast, if a chip is an application-specific integrated circuit (ASIC) then it cannot be reprogrammed.
 
Industry sources say that the use of FPGA for designing embedded systems is witnessing a marked increase over the last few years.
 
According to a Gartner Dataquest report, the number of design starts using FPGAs was around 80,000 in 2005 and expected to increase to around 120,000 by 2010. During the same period, the number of design starts using ASIC was around 3,000 and expected to remain the same over the next four-five year period.
 
Said Razak Mohammedali, university programs manager (South Asia Pacific), Altera Semiconductor India Pvt. Ltd., "The reason why the use of ASICs is now losing ground is that while the cost of its development is high, it also takes longer time to design - typically two years." Once designed, these also required to be sent for fabrication at the 'fabs'.
 
However, designing chips using FPGA is much faster (3-6 months) and overall development cost much lower. "Above all, FPGA devices are readily available with the vendors, and there is no need of sending your design to the fabs outside India," he said. Any change in designing using FPGAs is easily and quickly implemented.
 
Altera has announced the availability of Nios II C2H Compiler and Nios II Embedded Design Suite (EDS), a productivity tool for increasing performance of embedded systems using hardware accelerators.
 
Altera, which started its operations in India in December 2002, has been organising in November every year 'SOPC World', a forum for engineers who use the 'system on programmable chips' technology for developing embedded systems. Over 500 engineers across the world are expected to attend the meet this year.
 
This apart, Altera also runs a university programme which it works with various technical institutions in the country in teaching students how to develop embedded systems using FPGAs, he added.

 
 

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First Published: May 19 2006 | 12:00 AM IST

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