The Government is fully committed and ready to back the industry in developing cutting-edge competitive systems, Minister of State for electronics and information technology Rajeev Chandrasekar said on Sunday.
India has an exciting opportunity and to make that opportunity fruitful, it should focus on developing commercially and globally competitive technology, he said at an event here.
"The government is fully committed to making sure that DIR-V (Digital India RISC-V) microprocessor is the Indian ISA (Instruction Set Architecture), and we are ready to back the industry in developing cutting edge competitive systems," he said in a virtual address at the Digital India RISC-V Symposium.
The Government of India, working towards realising the ambition of self-reliance under the 'Atmanirbhar Bharat' campaign, has rolled out the Digital India RISC-V Microprocessor programme with an overall aim to create micro-processors for the future in India.
RISC stands for 'Reduced Instruction Set Computer' and 'V' stands for fifth generation. The RISC-V project commenced in 2010 and it aims to deliver a new level of free extensible software (software that allows new functionality and capability additions) and hardware freedom on architecture.
The next coming years are going to be about "performance, performance, and performance", and it would also be based on the "ability of our systems to outperform other comparable systems" (globally) based on the Indian Instruction Set Architecture (ISA)," he said.
"This is an important message that I want to give to Kamakoti (IIT Madras Director) and we expect DIR-V to have tremendous applications within the Indian ecosystem" he said.
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The symposium was organised by the Ministry of Electronics and Information Technology, IIT Madras and the IIT-Madras Pravartak Technologies Foundation.
Nearly 700 people, including students, industry professionals, researchers, took part in the event held at IIT Madras Research Park.
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